The Automation Core

Co-Packaged Optics Explained: 102.4T CPO Switches at OCP 2026 and Why Copper Runs Out at 200G

· 1.6T Ethernet, 102.4T switch, AI networking, Broadcom Tomahawk 6 Davisson, co-packaged optics, CPO, linear pluggable optics, LPO, OCP Global Summit 2026, pluggable optics, silicon photonics, TSMC COUPE,

Bottom line: The “end of copper” argument finally showed up as rack hardware. At the OCP Global Summit in San Jose (Oct 12–15), several vendors displayed switches built on Broadcom’s third-generation co-packaged optics (CPO) silicon: 102.4 Tb/s and 64 ports of 1.6T in a single box. Below are four engineering takeaways: where copper hits the wall, how the power math works, how the reliability problem is being handled, and what still blocks volume. Vendor figures come from press releases and product briefs; the conversions are my own illustrative arithmetic, not measurements.

What happened

  • Oct 8, Broadcom: announced it would show its third-generation TH6-Davisson CPO at OCP and named Celestica, Delta Electronics and Micas as partners demonstrating 102.4T CPO systems on the floor.
  • Oct 12, Celestica DS6005: 64 × 1.6TbE, 102.4 Tb/s in a 1.5OU chassis for OCP ORv3 racks, fully liquid-cooled, with field-replaceable external laser modules and SONiC support.
  • Oct 12, Micas Networks: previewed a 1RU CPO platform with 64 × 1.6T DR8 interfaces on 200G SerDes, with production scheduled for Q1 2027.
  • Oct 14, EE Times on Ayar Labs’ CPO Summit: Meta, Broadcom, AMD, MediaTek, Lumentum and Wiwynn broadly agreed that switches adopt CPO first, with a demand surge expected from about 2028.

Quick primer: in a conventional switch, the ASIC drives high-speed electrical signals across the board to the front panel, where a pluggable transceiver (with its own DSP to clean up the signal) converts them to light. CPO moves the optical engine onto the same package as the switch die, so the electrical path shrinks from tens of centimeters to millimeters. Davisson surrounds its die with 16 optical engines of 6.4 Tb/s each, built with TSMC COUPE technology.

Engineering point 1: copper fails on frequency times distance

Channel loss in copper rises with both signaling rate and length, so every speed bump shortens usable reach. MediaTek’s chief architect gave rule-of-thumb numbers at the summit: about 3 m at 100G per lane, about 1 m at 200G, and under 0.25 m at 400G. Davisson’s SerDes run at 212.5 Gb/s PAM4, which is exactly the generation where passive copper shrinks to about a meter. You can push copper further, but only by spending more power on equalization and retiming. Optics largely decouple loss from distance, which is what lets a scale-up domain grow beyond a single rack.

Engineering point 2: the power math

A fully retimed (DSP) 1.6T DR8 pluggable is specified at roughly 22 to 30 W. Populate all 64 ports and the optics alone draw about 1.4 to 1.9 kW, before the switch ASIC. Broadcom claims CPO cuts optical interconnect power by 70%. If that applies to this module budget, one switch saves roughly 1.0 to 1.3 kW. In energy per bit: 30 W ÷ 1.6 Tb/s ≈ 19 pJ/bit, 22 W ≈ 14 pJ/bit, and a 70% cut lands around 4 to 6 pJ/bit. The catch is that DSP modules are not the only competitor. Linear pluggable optics (LPO), which drop the DSP and let the switch SerDes do the equalization, are already specified under 10 W at 1.6T, about 6 pJ/bit. Against LPO, CPO’s margin is much thinner, and that is the real contest for the next few years. Note: Broadcom has not published the exact baseline behind its 70% figure, so this is my assumption-based arithmetic.

Engineering point 3: pull the laser out, liquid-cool the rest

The defining risk of CPO is that the optical engine is permanently attached. A failed pluggable is a two-minute swap; a failed co-packaged engine can mean scrapping the whole package. MediaTek put it bluntly: AI accelerators carry tens of thousands of dollars of HBM, and an optical engine dying after attach can take perfectly good silicon with it. That is why switches go first. They have no HBM and steadier power profiles, while an accelerator can swing tens of degrees almost instantly and optics are highly temperature sensitive. Two mitigations are now standard. First, move the most failure-prone and heat-sensitive part, the laser, out of the package into a front-panel external laser source (ELSFP) that can be replaced in the field. Second, liquid-cool the whole system, as Celestica does with the DS6005, so the optical engines see a stable temperature.

Engineering point 4: supply chain and standards are the bottleneck

The demos exist; the volume does not yet. Lumentum’s CTO said plainly that “this industry is not ready for the types of volumes that CPO is going to require.” Lasers, substrates, connectors and fiber all have to scale from niche lines toward CMOS-like volumes. Standards are the other gate. The OCI MSA, pushed by Meta among others, starts with four wavelengths at 50G and maps a five-generation path from 200G to 3.2T, with the goal that GPUs and switches from different vendors interoperate. My read: 2026 and 2027 are qualification years on the switch side, and compute-side CPO waits until field reliability and yield data are public.

Open questions

  • Broadcom gives only relative numbers (70% lower, more than 3.5×); no absolute pJ/bit or baseline definition is published.
  • DS6005 system power, pricing and ship dates are undisclosed; Micas’ CPO platform is a preview with production slated for Q1 2027.
  • There is no public field failure-rate data for CPO at scale, nor a clear service workflow for a failed optical engine.
  • The 22–30 W module figures and the savings math above are illustrative; real numbers depend on module vendor, reach and switch design.

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Quick poll: if you ran an AI data center network, would you deploy CPO now, or stay with pluggables and switch to LPO? Is saving about 1 kW per switch worth the “if it breaks, replace the whole board” risk? Tell me in the comments.

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