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DG Matrix Interport Hits 400 kW: How ST Gen3 SiC Doubles Multi-Port SST Power Density for AI Racks

 

Bottom line: DG Matrix says its Interport™ multi-port solid-state transformer now hits 400 kW—double the prior 200 kW—inside essentially the same power-module footprint, using STMicroelectronics Gen3 SiC MOSFETs. Platform efficiency is claimed above 98.5%. This is a commercial multi-port SST density step for AI racks and native 800 VDC narratives, not the NC State / NYPA 1 MVA utility-feeder demo covered on 09-24. SemiAnalysis (cited by DG Matrix) projects ~39 GW of new datacenter capacity underpinned by 800 VDC by 2030, with GPU racks already past ~600 kW.

Deep dive: SST revolution · SST shield · 400 V → 800 V / SiC

Where does the AI power bottleneck hit first—SST density, 800 VDC distribution standards, or grid / on-site generation interconnect speed?

Bottom line: On 24 September 2026, DG Matrix announced via Business Wire that its Interport™ multi-port solid-state transformer (SST) platform now delivers 400 kW—doubling the previous 200 kW—within essentially the same power-module footprint, enabled by STMicroelectronics’ latest-generation SiC MOSFETs. Platform efficiency is claimed above 98.5%. Treat this as a commercial product power-density step aimed at AI datacenters and electrification. Do not conflate it with the 09-24 NC State / NYPA / EPRI 1 MVA live utility-feeder demonstration at EPRI Lenox—that was a utility-scale experiment; today’s story is a multi-port SST product narrative for hyperscale and neocloud racks.

What happened

  • Power doubled, footprint held: Interport output moves 200 → 400 kW in essentially the same power-module envelope.
  • Device lever: ST Gen3 SiC MOSFETs; CTO Dr. Subhashish Bhattacharya’s public narrative emphasizes lower RDS(on) and thermally optimized packaging (company framing).
  • Efficiency claim: platform efficiency above 98.5% (company / platform statement—not independently audited here).
  • Multi-port architecture: a single software-defined stage converts, routes, and controls power among grid, on-site generation, storage, and compute loads; native 800 VDC readiness is part of the product story.
  • Market anchor (cited): DG Matrix cites SemiAnalysis’ “Inside the 800VDC Revolution”: roughly 39 GW of new datacenter capacity underpinned by 800 VDC by 2030; GPU rack power densities already past ~600 kW.

Engineering note: The >98.5% figure is a platform claim, not a curve from our lab. The ~39 GW / 2030 number is a SemiAnalysis projection cited by the companies, not our measurement. ST also supplies SiC for EV powertrains and highlights surge-current handling—relevant when AI workloads slam the bus with fast transients. The roadmap points at higher-voltage medium-voltage platforms and volume across hyperscale, neocloud, and electrification deployments.

Four engineering takeaways

1. Same module volume, 2× power = a rewritten density ledger
Datacenter operators rarely run out of “transformers” in the abstract; they run out of white space, electrical rooms, and cooling per watt. Doubling output without growing the module footprint means conduction/switching loss and thermal packaging moved the density ceiling—the commercial SST fight, not a debate about 99.5% line-frequency iron alone.

2. Multi-port SST: one software-defined stage, four energy ports
Interport’s pitch is not a single AC/DC brick. It folds grid, on-site generation, storage, and compute into one programmable stage. For hyperscalers and neoclouds, fewer coordination layers and faster “power-to-inference” deployment are the business story; electrically, the stage must still survive voltage, current, thermal, and GPU pulse-load envelopes.

3. 800 VDC × SiC: datacenter and automotive share the material logic
ST’s automotive SiC field experience is used as a reliability backstop; surge-current capability is called out for AI workload transients. The physics rhymes with the 400 V → 800 V / SiC density angle: raise voltage, drop current, shift copper and loss pressure onto wide-bandgap switches. The difference is always-on racks with hard transients and a native 800 VDC readiness narrative—not a single acceleration curve.

4. Keep the 09-24 1 MVA feeder demo in a separate bucket
The 09-24 NC State / NYPA / EPRI story was a 1 MVA SST on a live 13.2 kV utility feeder. Today is a DG Matrix commercial multi-port product doubling module power density for AI / 800 VDC. Both wear the SST label; scale, customer, and validation context do not. Do not equate a PR density step with a live feeder experiment.

Open questions

  • >98.5% efficiency remains a company platform claim without an independent public audit curve here.
  • SemiAnalysis ~39 GW by 2030 is a projection cited by DG Matrix / ST, not our statistic.
  • Exact Gen3 device part numbers, module topology detail, volume lead times, and unit pricing are undisclosed.
  • “Native 800 VDC readiness” is product narrative; site interconnect standards and protection coordination still need case-by-case proof.

@vkinng videos

Poll: For the next AI power step, does the bottleneck hit SST density, 800 VDC distribution standards, or grid / on-site generation interconnect speed first?

Sources: Business Wire / MarketMinute (2026-09-24); Power Electronics News; Electronics Buzz; DG Matrix; SemiAnalysis 800 VDC projection as cited by the companies.
Published for The Automation Core · YouTube @vkinng

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